1. Field of the Invention
The present invention relates to the process of designing and fabricating semiconductor chips. More specifically, the present invention relates to a method and an apparatus for identifying and correcting phase conflicts in a phase shift mask or layout.
2. Related Art
The relentless miniaturization of integrated circuits has been a key driving force behind technological innovation. This miniaturization has been made possible by significant improvements in various fabrication technologies.
Phase shift mask (PSM) technology is one such improvement. In PSM technology, phase shifters are inserted around certain mask/layout features, which enable a semiconductor manufacturing process to achieve line widths that are smaller than the wavelength of the light used to expose a photoresist layer through the mask. Typically, features that are smaller than a certain threshold width are difficult to print and need to have phase shifters around them. Such features are usually called critical features.
Specifically, a critical feature in the mask/layout is flanked by two phase shifters that have opposing phases (e.g., 180° apart). These phase shifters typically have a minimum width specification. In addition, shifters that are separated by less than a certain distance, d, need to be assigned the same phase. If two shifters are closer than d, they will be referred to as overlapping shifters. These constraints give rise to the phase assignment problem, which can be stated as follows: given a layout, construct a new layout that has shifters built around critical features (henceforth, referred to as a PSM-layout) and assign phases to the shifters in such a way that they satisfy the above constraints. (Note that, a PSM-layout is called phase-assignable if and only if there exists a correct solution for the phase assignment problem.)
It is hard to capture these constraints with traditional design rules used in layout generation like minimum width and spacing rules. Hence, it is highly likely that there will be a layout that satisfies all the design rules, and yet it is impossible to solve the phase assignment problem on its corresponding PSM-layout due to conflicting constraints. In other words, the PSM-layout is not phase-assignable. Adjacent phase shifters that belong to a cyclic sequence of phase dependencies that cannot be mapped according to the rules mentioned earlier are said to be in phase conflict. A layout that has phase conflicts cannot use PSM technology for imaging. This can adversely affect the printability of the layout and hence the final yield.
As semiconductor processes move towards deep submicron dimensions, an increasing number of features will be deemed critical and will need PSM technology for imaging. This would result in an increase both in the number and in the complexity of phase conflicts in PSM-layouts.
Hence, it is of utmost importance to develop a systematic and efficient methodology for identifying and correcting phase conflicts in a layout.